Skip to main content
The Symphony Hardware Vector (SHV) engines catalogue processors, CPU topology, caches, GPUs, NICs and fibre interfaces, motherboards, RAM, and NVMe. Default curation prioritizes original components and evidenced variants. Every engine is independently installable and read-only.

Engines

shv-engine

Hardware kernel: caller-defined coverage, retained-source catalogue replay, requirement evaluation, and graph projection.

shv-source-engine

Source ingestion and revision handling for hardware evidence.

shv-profile-engine

Component and system profile evaluation.

shv-partition-engine

Partitioning of catalogued hardware for reproducible selection.

shv-publication-engine

Governed local catalogue publication and selection.

shv-graph-adapter

Explicit graph transport surface.

shv-graph-duckdb-connector

Durable DuckDB-backed graph storage administered through qxctl.

shv-pdf-adapter

PDF source interpretation for hardware datasheets.

Administration highlights

  • Durable storage is administered only through shv graph store inspect|prepare|commit|status|query|export|schema|template. commit with the retained expected intent digest is also recovery; there is no separate recovery alias.
  • Catalogue publication is administered only through shv catalogue publication inspect|plan|apply|status|schema|template. Recovery is apply --operation-id, mutually exclusive with --input.
  • Inventory (release 0.2) adds shv graph store inventory: a revision-bound logical read with explicit retained writer identities. Legacy 0.1 selection remains supported.
Hardware classes are caller mapping and profile data, not duplicate command trees. --version selects the exact primary owner; --source-version and --adapter-version name distinct selected dependencies. Schema and mapping revisions are data identities, not aliases for installed engine versions.

SHV vector

Hardware Vector contract these engines implement.

qxctl vector commands

Full shv ... grammar reference.
Last modified on September 24, 2026